The present invention relates to communication between processes in a multiprocessor system, and more particularly relates to communications between partitions within a logically partitioned computer referred to as LPAR-to-LPAR communication.
In recent years the capacity of mainframe class servers has grown, and the quantity of data they are required to handle has grown with them. As a result, the existing prior art IBM System Z™ I/O architecture required modifications to support an order of magnitude increase in the bandwidth. In addition, new Internet applications increased the demand for improved latency. Adapters were needed to support more users and a larger number of connections to consolidate the external network interfaces. The combination of all of the above requirements presented a unique challenge to prior art server I/O subsystems. With the introduction of the prior art IBM zSeries computer has come an enhanced version of a new I/O architecture for the mainframe called queued direct I/O (QDIO). The architecture was initially exploited for Gigabit and Fast Ethernet adapters. More recently the architecture was exploited by the OSA-Express network adapter for Asynchronous Transfer Mode (ATM) and highspeed Token Ring connections, and it was exploited by so-called “HiperSockets” for internal LPAR-to-LPAR connections. In each of these features, the TCP/IP stack is changed to tightly integrate the new I/O interface and to offload key TCP/IP functions to hardware facilities. For external communications, the offloaded functions are performed by the OSAExpress hardware microcode; for internal communications, the offloaded functions are performed in the zSeries Licensed Internal Code (LIC). The result is a significant improvement in both latency and bandwidth for sockets-based messaging which is transparent to the exploiting applications. For more details, see “zSeries features for optimized sockets-based messaging: HiperSockets and OSA-Express” in IBM J. RES. & DEV. VOL. 46 NO. 4/5 July/September 2002.
In a multiprocessor environment or a logically partitioned computer as described above it is often desirable to move data from one processor to another or from one partition to another one. U.S. Pat. No. 6,854,021 discloses an any-to-any connectivity among discrete partitions or servers within a logically partitioned (LPAR) computer without requiring any physical cabling. Network latency is already quite low because no physical I/O adapter is required to perform the desired data transfer among discrete servers within a computer. Instead, a direct memory copy is performed by the sending central processing unit (CPU) from one server's memory to the memory of the other partition. Since the links among the discrete server are only virtual, no additional cabling or physical configuration is required when logical partitions are configured within the same computer. If this support is hidden under the TCP/IP protocol as an internally implemented cluster local area network (LAN), then applications can gain significant performance enhancements when communication occurs via these virtual links, without any application changes. Security is maintained among the partitions because the CPU I/O instruction is the only point of interception, since an adapter is not used for the communications. Since there is no physical media involved with these virtual links, the maximum bandwidth approaches that of the memory bus of the computer.
In this published patent, data is sent from one partition to a second partition within a logically partitioned computer. In a data processing system having multiple logical partitions, a send queue is established in the first logical partition, and a receive queue is established in the second logical partition. The send queue is registered in the lookup table available to all of the logical partitions. The send queue is registered using as a key the logical partition identification of the first logical partition and the subchannel number (LPAR-ID.SUBCHANNEL#) of the subchannel assigned to the partition. The receive queue is registered in the lookup table using as a key, the internet protocol address of the receive queue in the second partition. A send instruction from the first logical partition is executed which interrogates the lookup table using the LPAR-ID.SUBCHANNEL# key to locate the send queue and IP address key to locate the receive queue, and sends the data in the send queue in the first logical partition to the receive queue in the second logical partition. The entries of the send and receive queues contain arrays of addresses that point to data buffers. The send instruction performs the data copy directly from the sender's buffers to the target's receive buffers. The target partition may then be notified that the data is available in its receive buffers by either a polling model, an interrupt model or a combination of both.
The disadvantage of this prior art data sending between logical partitions, is the overhead of locating and analyzing the send queue and its array of buffer addresses. This will become especially apparent, when the amount of data sent with one instruction is quite low. Normally, the maximum size of one single data buffer is 4 kB, corresponding to one memory page. In cases in which only a single data buffer is moved by a send instruction, the prior art method performs significantly worse.
It is thus an objective of the present invention to provide an improved method for transferring data in a LPAR to LPAR communication with special reference to smaller data packages, in particular corresponding a data amount less than or equal to a memory page, for example 4 kB.